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  Datasheet File OCR Text:
 3.3V CMOS STATIC RAM 4 MEG (256K x 16-BIT)
Integrated Device Technology, Inc.
ADVANCE INFORMATION IDT71V416
FEATURES:
* 256K x 16 advanced high-speed CMOS Static RAM * JEDEC Center Power /GND pinout for reduced noise * Equal access and cycle times -- 12/15/20ns * Single 3.3V power supply * One Chip Select plus one Output Enable pin * Bidirectional data inputs and outputs directly TTL-compatible * Low power consumption via chip deselect * Upper and Lower Byte Enable Pins * Available in 44-pin, 400 mil plastic SOJ package
DESCRIPTION:
The IDT71V416 is a 4,194,304-bit high-speed Static RAM organized as 256K x 16. It is fabricated using IDT's highperfomance, high-reliability CMOS technology. This state-ofthe-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for high-speed memory needs. The IDT71V416 has an output enable pin which operates as fast as 6ns, with address access times as fast as 12ns. All bidirectional inputs and outputs of the IDT71V416 are TTLcompatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. The IDT71V416 is packaged in a 44-pin, 400mil Plastic SOJ.
FUNCTIONAL BLOCK DIAGRAM
OE# Output Enable Buffer
A0 - A17
Address Buffers
Row / Column Decoders
8 Chip Enable Buffer 8
CE#
High Byte Output Buffer High Byte Write Buffer
8 I/O 15
8 I/O 8
4,194,304-bit Memory Array
WE# Write Enable Buffer
16
Sense Amps and Write Drivers
8
Low Byte Output Buffer Low Byte Write Buffer
8
I/O 7
8
8
I/O 0
BHE# Byte Enable Buffers BLE# 3624 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
(c)1996 Integrated Device Technology, Inc.
JULY 1996
3624/-
10.1
1
IDT71V416 3.3V CMOS STATIC RAM 4 MEG (256K x 16-BIT)
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
A4 A3 A2 A1 A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7
PIN DESCRIPTION
A0 - A17 Address Inputs Chip Select Write Enable Output Enable High Byte Enable Low Byte Enable Data Input/Output 3.3V Power Ground Input Input Input Input Input Input I/O Power Gnd
3624 tbl 01
CE
I/O 0 I/O 1 I/O 2 I/O 3 VDD VSS I/O 4 I/O 5 I/O 6 I/O 7
OE BHE BLE
I/O 15 I/O 14 I/O 13 I/O 12 VSS VDD I/O 11 I/O 10 I/O 9 I/O 8 NC A8 A9 A10 A11 A17
CS WE OE BHE BLE
I/O0 - I/O15 VDD VSS
S044-1
WE
A15 A14 A13 A12 A16
3624 drw 02
SOJ TOP VIEW
ORDERING INFORMATION
IDT 71V416 Device Type S Power XX Speed XXX Package
Y
400-mil SOJ (S044-1)
12 15 20
Speed in nanoseconds
3624 drw 03
10.1
2


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